| Course Title | Code | Semester | L+U Hour | Credits | ECTS |
|---|---|---|---|---|---|
| Logical Circuits | MEM238 | 4. Semester | 4 + 1 | 5.0 | 5.0 |
| Prerequisites | None |
| Language of Instruction | Turkish |
| Course Level | Undergraduate |
| Course Type | |
| Mode of delivery | Face-to-Face |
| Course Coordinator |
Lect. Dr. Beytullah BOZALİ |
| Instructors | |
| Assistants | |
| Goals | Teaching fundamental knowledge about logic designing numerical circuits, gaining the skill of seeing events in logical way, gaining the skill of dividing problems into smaller parts and solving them. |
| Course Content | Introduction To Numerical Symbols And Systems, Numeric Systems And Transformations, Boolean Algebra, Boolean Functions And Features, Simplifying Methods : Karnaugh Map And Table Method, Numerical Logic Gates, Design Of Memoryless Logic Circuit, Collectors, Multiplexers, Code-Solvers, Coders, Programmable Logic Circuits : Pal, Pla, Prom, Eprom, Eeprom, The Analyse Of Watched-Memoried Logic Circuits, Obtaining Plots And Tables Of Situation, Situation Tables And Codings, Memoried Logic Circuit Design, Holders, Flip-Flops, Printers And Counters. |
| Learning Outcomes |
- Learns the number systems, codes and conversion used in digital systems - Learns the Boole Algebra, Boole Functions and Algebraic Simplification. - Learns the applications of Boole Algebra and Logic Gates. - Learns the Karnugh Maps and Quin-McCluskey Table simplification methods - Gains the knowledge on the multi-level logic gate circuits and multi-output logic circuits. - Learns the Decoder, Coder and Multiplexer Circuits. - Gains the knowledge on the Programmable Combinational Logic Circuits. |
| Week | Topics | Learning Methods |
|---|---|---|
| 1. Week | Introduction To Numerical Symbols And Systems | Verbal Expression |
| 2. Week | Numeric Systems And Transformations | Verbal Expression |
| 3. Week | Boolean Algebra, Boolean Functions And Features | Verbal Expression |
| 4. Week | Simplifying Methods : Karnaugh Map And Table Method | Verbal Expression |
| 5. Week | Numerical Logic Gates | Verbal Expression |
| 6. Week | Design Of Memoryless Logic Circuit | Verbal Expression |
| 7. Week | Collectors, Multiplexers, Code-Solvers, Coders | Verbal Expression |
| 8. Week | Programmable Logic Circuits : PAL, PLA, PROM, EPROM, EEPROM | Verbal Expression |
| 9. Week | Midterm ExamProgrammable Logic Circuits : PAL, PLA, PROM, EPROM, EEPROM | Verbal Expression |
| 10. Week | The Analyse Of Watched-Memoried Logic Circuits | Verbal Expression |
| 11. Week | Obtaining Plots And Tables Of Situation | Verbal Expression |
| 12. Week | Situation Tables And Codings | Verbal Expression |
| 13. Week | Memoried Logic Circuit Design | Verbal Expression |
| 14. Week | Holders, Flip-Flops, Printers And Counters | Verbal Expression |
| M. Morris Mano, Sayısal Tasarım (Çeviri), Literatür Yayıncılık: İstanbul, 2003. |
| Program Requirements | Contribution Level | DK1 | DK2 | DK3 | DK4 | DK5 | DK6 | DK7 | Measurement Method |
|---|---|---|---|---|---|---|---|---|---|
| PY1 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 40,60 |
| PY2 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 40,60 |
| PY3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 40,60 |
| PY4 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 40,60 |
| PY5 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 40,60 |
| 0 | 1 | 2 | 3 | 4 | 5 | |
|---|---|---|---|---|---|---|
| Course's Level of contribution | None | Very Low | Low | Fair | High | Very High |
| Method of assessment/evaluation | Written exam | Oral Exams | Assignment/Project | Laboratory work | Presentation/Seminar |
| Event | Quantity | Duration (Hour) | Total Workload (Hour) |
|---|---|---|---|
| Midterm 1 | 1 | 35.5 | 35.5 |
| Homework 1 | 5 | 2 | 10 |
| Final | 1 | 82.5 | 82.5 |
| Practice | 2 | 5 | 10 |
| Practice End-Of-Term | 1 | 5 | 5 |
| Classroom Activities | 5 | 2 | 10 |
| Total Workload | 153 | ||
| ECTS Credit of the Course | 5.0 | ||
